*SCR;sm_SCR;SpiceMod;Test;DUT
*DWG CIRCUITS\SpiceMod\SCR\SCR.DWG
* SCRs;General;
*SYM=SCR
.SUBCKT sm_SCR 1 2 3 (Temp = 27 )
*HELP issyntax.hlp "SCRs"
* TERMINALS: A G K
QP 6 4 1 POUT Temp = { Temp }
QN 4 6 3 NOUT Temp = { Temp } OFF
RGK 3 6 100k
RG 2 6 18.3
DF 6 4 ZF
DR 1 4 ZR
DGK 6 3 ZGK
.MODEL ZF D ( IS=34.4p IBV=980n BV=1.80k )
.MODEL ZR D ( IS=34.4p IBV=252n BV=1.80k )
.MODEL ZGK D ( IS=34.4p IBV=252n BV=5.00 )
.MODEL POUT PNP ( IS=34.4n BF=2 BR=2 CJE=592p
+ RC=1.48m ISE=252u ISC=25.0u NE=2.50 TF=780n TR=14.6u )
.MODEL NOUT NPN ( IS=34.4n BF=50.0 BR= 2 CJE=2.96n CJC=592p
+ RC=1.48m ISE=493u ISC=25.0u NE=2.50 TF=260n TR=14.6u)
.ENDS
